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datasheet please read the important notice and warnings at the end of this document v 2.1 www.infineon.com page 1 of 53 2017 - 08 - 11 ice5qrxxxxax quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package product highlights ? integrated 700 v /800 v avalanche rugged coolmos? ? novel quasi - resonant operation and proprietary implementation for low emi ? enhanced active burst mode with selectable entry and exit standby power ? active burst mode to reach the lowest standby power <100 mw ? fast startup achieved with c ascode configuration ? digital frequency reduction for better overall system efficiency ? robust line protection with input ovp and brownout ? comprehensive protection ? pb - free lead plating, halogen free mold compound, rohs compliant features ? integrated 700 v /800 v avalanche rugged coolmos? ? minimum switching frequency difference between low & high line for higher efficiency & better emi ? enh anced active burst mode with selectable entry and exit standby power ? active burst mode to reach the lowest standby power <100 mw ? fast startup achieved with c ascode configuration ? digital frequency reduction up to 10 zero crossings ? built - in digital soft start ? c ycle - by - cycle peak current limitation ? maximum on/off time limitation to avoid audible noise during start up and power down ? robust line protection with input ovp and brownout ? auto restart mode protection for vcc over voltage, vcc under voltage, over load/open loop, output over voltage, over temperature and cs (current sense) s hort to gnd ? limited charging current for vcc short to gnd ? pb - free lead plating, halogen free mold compound, rohs compliant applications ? auxiliary power supply for home appliances /white goods, tv, pc & server ? blu - ray player, set - top box & lcd/led monitor description the quasi - resonant coolset? - ( ice5qrxxxxax ) is the 5 th generation of quasi - resonant integrated power ic optimized for off - line switch power supply in cascode configurat ion. it is housed in single package with 2 separate chips ; one is controller chip and other is hv mosfet chips. the ic can achieve lower emi and higher efficiency with improved digital frequency reduction through the proprietary novel quasi - resonant operat ion. the enhanced active burst mode enables flexibility in standby power range selection. the product has a wide operation range (10 ~ 25.5 v) of ic power supply and lower power consumption. the numerous protection functions including the robust line prote ction (both input ovp and brownout ) to support the protections of the power supply system in failure situations . a ll of these make the coolset? ( ice5qrxxxxax ) series an outs tanding integrated power device in quasi - resonant flyback converter in the market. figure 1 typical application pg - d ip - 7 pg - d so - 12
datasheet 2 of 53 v 2.1 2017 - 08 - 11 qu asi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package output power of 5th generation quasi - resonant coolset? output power of 5th generation quasi - resonant coolset? table 1 output power of 5 th generation quasi - resonant coolset? type package marking v ds r dson 1 22 0v ac 20 % 2 85 - 300 v ac 2 ice5qr4770az pg - dip - 7 5qr4770az 7 00 v 4.73 ? 27 w 15 w ICE5QR4780AZ pg - dip - 7 5qr4780az 800 v 4.13 ? 28 w 15 w ice5qr2270az pg - dip - 7 5qr2270az 7 00 v 2.13 ? 41 w 22 w ice5qr2280az pg - dip - 7 5qr2280az 800 v 2.13 ? 41 w 22 w ice5qr1070az pg - dip - 7 5qr1070az 7 00 v 1.15 ? 58 w 32 w ice5qr0680az pg - dip - 7 5qr0680az 800 v 0.71 ? 74 w 41 w ice5qr4770ag pg - dso - 12 5qr4770ag 7 00 v 4.73 ? 27 w 15 w ice5qr1680ag pg - dso - 12 5qr1680ag 8 00 v 1.53 ? 50 w 27 w ice5qr0680ag pg - dso - 12 5qr0680ag 8 00 v 0.71 ? 77 w 42 w 1 t yp . at t j =25c (inclusive of low side mosfet) 2 calculated maximum output power rating in an open frame design at t a =50c , t j =125c (integrated high voltage mosfet) and using minimum drain pin copper area in a 2 oz copper single sided pcb. the output power figure is for selection purpose only. the actual power can vary depending on particular designs. please contact to a technical expert from infineon for more information.
datasheet 3 of 53 v 2.1 2017 - 08 - 11 qu asi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package table of contents table of contents product highlights ................................ ................................ ................................ .......................... 1 features ................................ ................................ ................................ ................................ ........ 1 applications ................................ ................................ ................................ ................................ ... 1 description ................................ ................................ ................................ ................................ .... 1 output power of 5th generation quasi - resonant coolset? ................................ ................................ 2 table of contents ................................ ................................ ................................ ........................... 3 1 pin configuration and functionality ................................ ................................ ......................... 5 2 representative block diagram ................................ ................................ ................................ . 6 3 functional description ................................ ................................ ................................ ............ 7 3.1 v cc pre - charging and typical v cc voltage during start - up ................................ ................................ ..... 7 3.2 soft - start ................................ ................................ ................................ ................................ .................. 7 3.3 normal operation ................................ ................................ ................................ ................................ ... 8 3.3.1 digital frequency reduction ................................ ................................ ................................ ............. 8 3.3.1.1 minimum zc count determination ................................ ................................ .............................. 8 3.3.1.2 up/down counter ................................ ................................ ................................ .......................... 8 3.3.1.3 zero crossing (zc counter) ................................ ................................ ................................ ........... 9 3.3.2 ringing suppression time ................................ ................................ ................................ ................ 10 3.3.2.1 switch on determination ................................ ................................ ................................ ............ 10 3.3.3 switch off determination ................................ ................................ ................................ ................. 10 3.3.4 modulated gate drive ................................ ................................ ................................ ....................... 11 3.4 current limitation ................................ ................................ ................................ ................................ .. 11 3.5 active burst mode with selectable power level ................................ ................................ .................... 11 3.5.1 entering active burst mode operation ................................ ................................ ............................ 12 3.5.2 during active burst mode operation ................................ ................................ ............................... 12 3.5.3 leaving active burst mode operation ................................ ................................ ............................. 13 3.6 protection functions ................................ ................................ ................................ ............................. 14 3.6. 1 line over voltage ................................ ................................ ................................ ............................. 14 3.6.2 brownout ................................ ................................ ................................ ................................ .......... 14 3.6.3 v cc ovder voltage or under voltage ................................ ................................ ................................ . 14 3.6.4 over load ................................ ................................ ................................ ................................ ......... 14 3.6.5 output over voltage ................................ ................................ ................................ ........................ 15 3.6.6 over temperature ................................ ................................ ................................ ............................ 15 3.6.7 cs short to gnd ................................ ................................ ................................ ............................... 15 4 electrical characteristics ................................ ................................ ................................ ....... 17 4.1 absolute maximum ratings ................................ ................................ ................................ .................. 17 4.2 operating range ................................ ................................ ................................ ................................ .... 19 4.3 operating conditions ................................ ................................ ................................ ............................ 19 4.4 internal voltage reference ................................ ................................ ................................ .................... 20 4.5 pwm section ................................ ................................ ................................ ................................ .......... 20 4.6 current sense ................................ ................................ ................................ ................................ ........ 20 4.7 soft start ................................ ................................ ................................ ................................ ................ 21 4.8 digital zero crossing ................................ ................................ ................................ ............................. 21 4.9 active burst mode ................................ ................................ ................................ ................................ .. 22 4.10 line over voltage protection ................................ ................................ ................................ ................ 22 4.11 brownout protection ................................ ................................ ................................ ............................. 22 4.12 v cc over voltage protection ................................ ................................ ................................ .................. 23
datasheet 4 of 53 v 2.1 2017 - 08 - 11 qu asi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package table of contents 4.13 over load protection ................................ ................................ ................................ ............................ 23 4.14 output over voltage protection ................................ ................................ ................................ ........... 23 4.15 thermal protection ................................ ................................ ................................ ............................... 23 4.16 cs short to gnd protection ................................ ................................ ................................ .................. 24 4.17 coolmos? section ................................ ................................ ................................ ................................ 24 5 coolmos? performance characteristics ................................ ................................ .................. 26 6 output power curve ................................ ................................ ................................ .............. 40 7 outline dimension ................................ ................................ ................................ ................. 49 8 marking ................................ ................................ ................................ ................................ 51 revision history ................................ ................................ ................................ ............................. 52
datasheet 5 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package pin configuration and functionality 1 pin configuration and functionality the pin configuration is shown in figure 2 and the functions are described in table 2 . figure 2 pin configuration table 2 pin definitions and functions pin symbol function dip - 7 dso - 12 1 1 fb feedback & burst entry/exit control fb pin combines the functions of feedback control, selectable burst entry /exit control and overload/open loop protection. 2 2 vin input line ovp & brownout vin pin is connected to the bus via resistor divider (see figure 1 ) to sense the line voltage. this pin combines the functions of input line ovp, brownout and minimum zc count setting for low and high line. 3 3 cs current sense th e cs pin is connected to the shunt resistor for the primary current sensing externally and to the pwm signal generator block for switch - off determination (together with the feedback voltage) internally. moreover, cs pin short to ground protection is sensed by this pin. 4 4 zcd zero crossing detection zcd pin combines the functions of start up, zero crossing detection and output over voltage protection. during the start up, it is used to provide a voltage level to the gate of power switch coolmos tm to charge v cc capacitor. 5 5, 6, 7, 8 drain drain the drain pin is connected to the drain of the integrated coolmos tm . 7 11 vcc vcc( positive voltage supply ) the vcc pin is the positive voltage supply to the ic . the operating range is between v vcc _off and v vcc _ ovp . 8 12 gnd ground the gnd pin is the common ground of the cool set tm . - 9, 10 nc not connected. 1 7 8 4 3 2 5 g n d f b v i n c s v c c z c d d r a i n p g - d i p - 7 1 1 0 1 1 1 2 4 3 2 9 g n d v i n f b c s v c c n c z c d n c p g - d s o - 1 2 8 6 5 7 d r a i n d r a i n d r a i n d r a i n
datasheet 6 of 5 3 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package representative block diagram 2 representative block diagram figure 3 representative block d iagram note: ? ? junction temperature of the controller chip is sensed for over temperature protection. the coolmos tm is a separated chip from the controller chip in the same package. please refer to the design guide and/or consult a technical expert from infineon for the proper thermal design. c o o l m o s t m b r o w n i n / o u t t h e r m a l p r o t e c t i o n l o v p 1 g 7 r s q a u t o r e s t a r t p r o t e c t p r o t e c t i o n r f b 2 5 k 2 p f d 1 & g 1 t f b _ b e b a c t i v e b u r s t b l o c k f b c 1 1 v f b _ b o f f c 1 v z c d _ r s a c t i v e b u r s t m o d e c o u n t e r t c o u n t c 2 v z c d _ c t u p / d o w n c o u n t e r z c c o u n t e r c l k c o m p a r a t o r v r e f c s v c c g p w m p w m o p c u r r e n t m o d e p w m c o m p a r a t o r v p w m v o l t a g e r e f e r e n c e u n d e r v o l t a g e l o c k o u t 1 6 v 1 0 v 5 0 u s i n t e r n a l b i a s p o w e r m a n a g e m e n t r e g u l a t i o n c u r r e n t l i m i t i n g / c u r r e n t s e n s e s h o r t t o g n d p r o t e c t i o n 1 0 k d 2 1 p f p e a k c u r r e n t l i m i t c 1 3 z e r o c r o s s i n g g a t e d r i v e r g n d c 1 2 v v c c _ o v p t j > t j c o n _ o t p * c 7 a v v i n _ l o v p r s q a u t o r e s t a r t p r o t e c t i n p u t o v p m o d e 2 5 0 s b l a n k i n g t i m e v c s _ f b c 1 6 b v v i n _ b i r s q a u t o r e s t a r t p r o t e c t b r o w n o u t m o d e 2 5 0 s b l a n k i n g t i m e z c d v c s _ b l 1 v c s _ n v c s _ b l 2 c 8 v v i n _ r e f c 1 6 a v v i n _ b o r s q a u t o r e s t a r t p r o t e c t t j < t j c o n _ o t p - t j h y s _ o t p o t p m o d e 5 0 s b l a n k i n g t i m e c 1 7 v c s _ s t g d e l a y t c s _ s t g _ s a m c 6 v z c d _ o v p c o u n t e r p z c d _ o v p _ b t v i n _ r e f r z c d c 1 5 c 2 0 v 1 d r a i n v i n c 1 0 v f b _ b o n c 4 c 3 c 5 v f b _ r c 1 2 v f b _ o l p / v f b _ l b t f b _ o l p _ b v f b _ h l c v f b _ l h c l e a d i n g e d g e b l a n k i n g t c s _ l e b 1 g 2 r s q a u t o r e s t a r t p r o t e c t 1 g 3 & g 5 1 g 4 & g 6 f s b o s c s o f t - s t a r t r i n g i n g s u p p r e s s i o n r s q g 8 & g 9 g a t e d r i v e t o n m a x p w m c o n t r o l e n t o f f m a x g a t e d r i v e d 3 b u r s t m o d e d e t e c t b u r s t m o d e l e v e l s e l e c t v f b _ e b l 2 v f b _ e b l 1 c 9
datasheet 7 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package functional description 3 functional description 3.1 v cc pre - charging and typical v cc voltage during start - up as shown in figure 1 , once the line input voltage is applied, a rectified voltage appears across the capacitor c bus . the pull up resistor r startup provides a current to charge the c iss (input capacitance) of coolmos? and gradu ally gen erate one voltage level. if the voltage over c iss is high enough, coolmos? on and v cc capacitor will be cha rged through primary inductance of transformer l p , coolmos? and internal diode d 3 with two steps constant current source i vcc _ charge1 1 and i vcc _ charge3 1 . a very small constant current source (i vcc_charge1 ) is charged to the v cc capacitor till v cc reach v cc_scp to protect the controller from v cc pin short to ground during the start up . after this, the second step constant current source (i vcc _charge3 ) is provided to charge the v cc capacitor further, until the v cc voltage exceeds the turned - on threshold v vcc _on . as shown in the time phase i in figure 4 , the v cc voltage increase almost linearly with two steps. figure 4 vcc voltage and current at start up the time taking for the v cc pre - charging can then be approximately calculated as: ? 1 = ? a + ? b = ? ??? _ ??? ? ? ??? ? ??? _ ? ? ????? 1 + ( ? ??? _ ?? ? ? ??? _ ??? ) ? ? ??? ? ??? _ ? ? ????? 3 cc voltage exceeds the v cc turned on threshold v vcc _on at time t 1 , the ic begins to operate with soft start. due to power consumption of the ic and the fact that there is still no energy from the auxiliary winding to charge the v cc capacitor before the output voltage is built up, the v cc voltage drops (phase ii). once the output voltage is high enough, the v cc capacitor receives the energy from the auxiliary winding from the time t 2 onward and delivering the i vcc _ normal 2 to the coolset? . the v cc then will reach a constant value depending on output load. 3.2 soft - start as shown in figure 5 , at the time t on , the ic begins to operate with a soft - start. by this s oft - start the switching stresses for the mosfet , diode and transformer are minimized. the soft - start implemented in ice5qrxxxxax is a digital time - based function. the preset soft - start time is t ss (12 ms ) with 4 steps. if not limited by other functions, th e peak voltage on cs pin will increase step by step from 0.3 v to 1 v finally. during the first 3 ms of 1 i vcc _ charge1/2/3 is charging current fro m the controller to vcc capacitor during start up 2 i vcc _ normal is supply current from vcc capacitor or auxiliary winding to the coolset? during normal operation ( v vcc _ on ) 16 v v vcc ( v vcc _ off ) 10 v t t a t b ( v vcc _ scp ) 1 . 1 v i vcc _ charge 2 / 3 ) - 3 / - 3 . 2 ma i vcc t ( i vcc _ normal ) 0 . 9 ma ( i vcc _ charge 1 ) - 0 . 2 ma - i vcc 0 t 1 t 2 i ii iii
datasheet 8 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package functional description soft start, the ringing suppression time is set to 25 s to avoid irregular switching due to switch off oscillation noise. figure 5 maximum current sense voltage during soft start 3.3 normal operation d uring normal operation , t he ice5qrxxxxax works with a digital signal processing circuit composing an up/down counter, a zero - crossing counter (zc counter) and a comparator, and an analog c ircuit composing a current measurement unit and a comparator. the switch - on and - off time points are each determined by the digital circuit and the analog circuit, respectively. the input information of the zero - crossing signal and the value of the up/down counter are needed to determine the switch - on while the feedback signal v fb and the current sensing signal v cs are necessary for the switch - off determination. details about the full operation of the coolset? in normal operation are illustrated in the following paragraphs. 3.3.1 digital frequency reduction as mentioned above, the digital signal processing circuit consists of an up/down counter, a zc counter and a comparator. these three parts are key to implement digital frequency reduction with decreasing load. in addition, a ringing suppression time controller is implemented to avoid mis - triggering by the high frequency oscillation when the output voltage is very low under conditions such as soft start period or output short circuit. functionality of these parts is described as in the following. 3.3.1.1 minimum z c count d etermination to reduce the switching frequency difference between low and high line, minimum zc count determination is implemented. minimum zc count is set to 1 if v in less than v v in _ref which represents for low line. for high line, minimum zc count is set to 3 after v in higher than v vi n _ref . there is also a hysteresis v vi n _ref with certain blanking time t vi n _ref for stable ac line selection between low a nd high line. 3.3.1.2 up/down counter the up/down counter stores the n umber of the zero crossing which determine s valley numbers to switch - on the main mosfet after demagnetization of the transformer. this value is fixed according to the feedback voltage, v fb , which contains information about the output power. indeed, in a typical peak current mode control, a high output power results in a high feedback voltage, and a low output power leads to a low feedback voltage. hence, according to v fb , the value in the u p/down counter is changed to vary the power t o n 3 6 9 1 2 0 . 3 0 0 . 4 5 0 . 6 0 0 . 7 5 v c s _ p e a k v c s ( v ) t i m e ( m s )
datasheet 9 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package functional description mosfet off - time according to the output power. in the following, the variation of the up/down counter value according to the feedback voltage is explained. the feedback voltage v fb is internally compared with thr ee threshold voltages v fb _ l hc , v fb _ h lc and v fb _ r at each clock period of 48 ms. the up/down counter counts then upward, keep unchanged or count downward, as shown in table 3 . table 3 operation of up/down counter v fb up/down counter action always lower than v fb_ lhc count upwards till n=8/10 1 once higher than v f_ lhc , but always lower than v fb_ hlc stop counting, no value changing once higher than v fb_ hlc , but always lower than v fb_ r count downwards till n=1/3 2 once higher than v fb_ r set up/down counter to n=1/3 2 the number of zero crossing is limited and t herefore, the counter varies among 1 to 8 ( for low line) or 3 to 10 ( for high line) and any attempt beyond this range is ignored. when v fb exceeds v fb_ r voltage, the up/down counter is reset to 1 (low line) and 3 (high line) in order to allow the system to react rapidly to a sudden load increase. the up/down counter value is also reset to 1 (low line) and 3 (high line) at the start - up time, to ensure an efficient maximum load start up. figure 6 shows some examples on how up/down counter is changed according to the feedback voltage over time. the use of two different thresholds v fb_ lhc and v fb_ hlc to count upward or downward is to prevent frequency jittering when the feedback voltage is close to the threshold point. low line high line figure 6 up/down counter operation 3.3.1.3 zero crossing (zc counter) in the system, the voltage from the auxiliary winding is applied to the zcd pin through a rc network, which provides a time delay to the voltage from the auxiliary winding. internally this pin is connected to a negative clamping network, a zero - crossing detector, an output overvoltage detector and a ringing suppression time contr oller. during on - state of the power switch, a positive gate drive voltage is applied to the zcd pin due to r zcd resistor , hence external diode d zc (see figure 1 ) is added to block t he negative voltage from the aux iliary winding . 1 n=8 (for low line) and n=10 (for high line) 2 n=1 (for low line) and n=3 (for high line) 1 c a s e 3 c a s e 2 c a s e 1 u p / d o w n c o u n t e r n n + 1 n + 2 n + 3 n + 3 n + 3 n + 2 n + 1 n 5 6 7 8 8 8 7 6 5 1 1 2 3 4 5 5 5 4 3 2 8 8 8 8 8 8 7 6 5 t t v f b v f b , r 1 v f b , h l c v f b , l h c c l o c k t = 4 8 m s 1 3 c a s e 3 c a s e 2 c a s e 1 u p / d o w n c o u n t e r n n + 1 n + 2 n + 3 n + 3 n + 3 n + 2 n + 1 n 6 7 8 9 9 9 8 7 6 3 3 4 5 6 7 7 7 6 5 4 1 0 1 0 1 0 1 0 1 0 1 0 9 8 7 t t v f b v f b , r 3 v f b , h l c v f b , l h c c l o c k t = 4 8 m s 3
datasheet 10 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package functional description the zc counter has a minimum v alue of 1 ( for low line ) or 3 (for high line ) and maximum value of 8 ( for low line ) or 10 ( for high line ) . after the internal high voltage coolmos? is turned off, every time when the falling voltage ramp of on zcd pin crosses the v zc d_ ct threshold, a zero crossing is detected and zc counter will increase by 1. it is reset every time after the driver output is changed to high. to achieve the switch on at voltage valley, the voltage from the auxiliary winding is fed to a time delay network (the rc network consists of r zc and c zc as shown in figure 1 ) before it is app lied to the zero - crossing detector through the zc d pin. the needed time delay to the main oscillation signal t should be approximately one fourth of the oscillation period, t osc (by transformer primary inductor and drain - source capacitor) minus the propag ation delay from the detected zero - crossing to the switch - on of the main switch t delay , theoretically: t = ? ??? 4 ? ? ????? ? td = ? ?? . ? ?? ? ? ??? ? ?? + ? ??? 3.3.2 ringing suppression time after coolmos? is turned off, there will be some oscillation on v ds , which will also appear on v zc d . to avoid mis - triggering by such oscillations to turn on the coolmos? , a ringing suppression timer is implemented. this suppression time is depended on the voltage v zcd . if the voltage v zcd is lower than the threshold v zc d_ rs , a longer preset time t zc d_ rs 2 is applied. however, if the voltage v zc d is higher than the threshold, a shorter time t zc d_ rs1 is set. 3.3.2.1 switch on determination after the gate drive goes to low, it cannot be changed to high during ring suppression time. after ring suppression time, the g ate drive can be turned on when the zc counter value is equal to up/down counter value. however, it is also possible that the oscillation between primary inductor and drain - source capacitor damps very fast and ic cannot detect zero crossings event . in this case, a maximum off time is implemented. after gate drive has been remained off for the period of t offmax , the gate drive will be turned on again regardless of the zc counter values and v zcd . this function can effectively prevent the switching frequen cy from going lower than 20 khz. otherwise it will cause audible noise. 3.3.3 switch off de termination in the converter system, the primary current is sensed by an external shunt resistor, which is connected between the internal low side mosfet and the common ground. the sensed voltage across the shunt resistor v cs is applied to an internal current measurement unit, and its output voltage v 1 is compared with the feedback voltage v fb . once the voltage v 1 exceeds the voltage v fb , the output flip - flop is reset. as a result, the main power switch is switched off. the relationship between the v 1 and the v cs is described by ( see figure 3 ) : ? 1 = ? ??? ? ? ?? + ? ??? leb , is applied to the output of the comparator. in other words, once the gate drive is turned on, the minimum on time of the gate drive is the leading edge blanking time. in addition, there is a maximum on time, t onmax , limitation i mplemented in the ic. once the gate drive has been in high state longer than the maximum on time, it will be turned off to prevent the switching frequency from going too low because of long on time.
datasheet 11 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package functional description 3.3.4 modulated gate drive the drive - stage is optimized for emi consideration. the switch on speed is slowed down before it reaches the coolmos tm turn on threshold. that is a slope control of the rising edge at the output of driver ( see figure 7 ). thus the leading switch spike during turn on is minimized. figure 7 gate rising waveform 3.4 current l imitation there is a cycle by cycle current limitation realized by the current limit comparator to provide over - current detection. the source current of the coolmos? is sensed via a sense resistor r cs . by means of r cs the source current is transformed to a sense voltage v cs which is fed into the pin cs. if the voltage v cs exceeds an internal voltage limit, adjusted according to the line voltage, the comparator immediately turns off the gate drive. when the main bus vo ltage increases, the switch on time becomes shorter and therefore the operating frequency is also increased. as a result, for a constant primary current limit, the maximum possible output power is increased which is beyond the converter design limit. to co mpensate such effect , both the internal peak current limit circuit (v cs ) and the zc count varies with the bus voltage according to figure . figure 8 variation of the v cs limit voltage according to the v in voltage 3.5 active burst mode with selectable power level at light load condition, the ic enters active burst mode operation to minimize the power consumption. details about active burst mode operation are explained in the following paragraphs. t ( n s ) 5 v t y p . t = 1 1 7 n s v g a t e ( v ) v g a t e _ h i g h v c s ( v ) v v i n ( v ) 0 . 8 3 0 . 9 v c s _ n , 1 1 . 2 9 v v i n _ r e f s t a r t i n g z c = 1 s t a r t i n g z c = 3
datasheet 12 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package functional description the burst mode entry level can be sele cted by changing the different r esistor r sel at fb pin. there are 2 levels to be selected with different r esistor which are targeted for low range of active burst mode power (level 1) and high range of active burst mode power (level 2). the following table show s the control logic for the entry and exit level with the fb voltage. table 4 two levels entry and exit active burst mode power level v fb v cs entry level exit level v fb _eblx v fb _lb 1 v fb > v ref_b v cs_bl1 = 0.31 v 0.90 v 2.75 v 2 v fb < v ref_b v cs_bl2 = 0.35 v 1.05 v 2.75 v during ic first startup, the internal ref good signal is logic low when v cc < 4 v. it will reset the burst mode level detection latch. when the burst mode level detection latch is low and ic is in off state, the ic internal r fb resistor is disconnected from the fb pin and a current source i sel is turned on instead. from vcc=4 v to vcc on threshold, the fb pin will start to charge to a voltage level associated with r sel resistor. when vcc reaches vcc on threshold, the fb voltage is sensed. the burst mode thresholds are then chosen according to the fb voltage level. the burst mode level detection latch is then set to high. once the detection latch is set high, any change of the fb level will not change the threshold selection . t he current source i sel is turned off in 2 s after v cc reaches v cc on threshold and the r fb resistor is re - connected to fb pin (see figure 9 ). figure 9 burst mode detect and adjust 3.5.1 entering active burst mode operation for determination of entering active burst mode operation, three conditions apply: ? the feedback voltage is lower than the threshold of v fb _ eb lx ? the up/down counter is 8 for low line or 10 for high line and ? the above two conditions remain after a certain blanking time t fb_b eb (20 ms). once all of these conditions are fulfilled, the active burst mode flip - flop is set and the controller enters active burst mode operation. this multi - condition determination for entering active burst mode operation prevents mis - triggering of entering active burst mode operation, so that the controller enters active burst mode operation only when the output power is really low during the preset blanking time. 3.5.2 during active burst mode operation after entering the active burst mode the feedback voltage rises a s v o starts to decrease due to the inactive pwm section. one comparator observes the feedback signal if the voltage level v fb _ bon is exceeded. in that case the internal circuit is power up to res trart with switching. fb selection logic v dd v cs _ blx v fb _ e bl x i sel ref good uvlo control unit s 1 s 2 2 s delay r s burst mode detection latch r sel compare logic v ref _ b r fb
datasheet 13 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package functional description turn - on of the power mosfet is trigger ed by zc counter with a fixed value of 8 zc for low line and 10 zc for high line . turn - off is resulted if the voltage across the shunt resistor at cs pin hits the threshold v cs_blx . if the output load is still low, the feedback signal decreases as the pwm section is operating. when feedback signal reaches the low threshold v fb _ boff , the internal circuit is reset again and the pwm section is disabled until next time v fb signal increases beyond the v fb_bon threshold. in active burst mode , the feedback signal is changing like a saw tooth between v fb _ boff and v fb _ bon (see figure 10 ) . 3.5.3 leaving active burst mode operation the feedback voltage immediatel y increases if there is a high load jump. this is observed by a compar ator with threshold of v fb _ lb . as the current limit is v cs_blx (31 % or 35%) during active burst mode , a certain load is needed so that feedback voltage can exceed v fb _ lb . after leaving active burst mode, normal peak current control through v fb is re - activated . in addition, the up/down counter will be set to 1 ( low line ) or 3 (high line ) immediately after leaving active burst mode. this is helpful to minimize the output voltage undershoot. figure 10 signals in active burst mode v f b _ e b x v f b _ b o n v f b _ l b v f b t v c s _ b l x v c s _ n v c s v v c c _ o f f v v c c t t v o t v f b _ b o f f t i m e t o 8 t h / 1 0 t h z c a n d b l a n k i n g t i m e ( t f b _ b e b ) c u r r e n t l i m i t l e v e l d u r i n g a c t i v e b u r s t m o d e l e a v i n g a c t i v e b u r s t m o d e e n t e r i n g a c t i v e b u r s t m o d e m a x . r i p p l e < 1 %
datasheet 14 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package functional description 3.6 protection functions the ice5qrxxxxax provides numerous protection functions which considerably improve the power supply system robustness, safety and reliability. the following table summarizes these protection functions. there are 3 different kinds of protection mode; non switch auto restart, auto restart and odd skip auto restart. the details can refer to the figure 11 , figure 12 and figure 13 . table 5 p rotection functions protection functions normal mode burst mode protection mode burst on burst off line over v oltage non switch auto restart brownout non switch auto restart v cc over v oltage na 1 odd skip auto restart v cc under v oltage auto restart over l oad na 1 na 1 odd skip auto restart output over voltage na 1 odd skip auto restart over t emperature non switch auto restart cs short to gnd na 1 odd skip auto restart 3.6.1 line over voltage the ac line over voltage p rotection is detected by sensing bus capacitor voltage through vin pin via 2 potential divider resistors, r l 1 and r l 2 (see figure 1 ) . once v vin voltage is higher than the line over voltage threshold v vin_ lovp , the controller enters line over voltage protection and it releases the protection mode after v vin is lower than v vin_ lovp . 3.6.2 brownout the brownout protection is observed by vin pin simila r to line over voltage p rotection method with a different voltage threshold level. when v vin voltage is lower than the browno ut threshold ( v vin_b o ), the controller enters brownout protection and it releases the protection mode after v vin higher than brownin threshold ( v vin_bi ). 3.6.3 v cc ov der voltage or und er voltage during operation, the v cc voltage is continuously monitored. in case of a v cc over voltage or under voltage , the ic is reset and the main power switch is then kept off. after the v cc voltage falls below the threshold v vcc _off , the new start up sequence is activated. the v cc capaci tor is then charged up. once the voltage exceeds the threshold v vcc _on , the ic begins to operate with a new soft - start. 3.6.4 over load in case of open control loo p or output o ver l oad , the feedback voltage will be pulled up and exceed v fb_olp . after a blanking time of t fb_ olp_b , the ic enters auto restart mode. the blanking time here enables the converter to operate for a certain time during a sudden load jump. 1 not applicable
datasheet 15 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package functional description 3.6.5 output over voltage during off - time of the power mosfet , the voltage at the zcd pin is monitored for o utput over voltage detection. if the voltage is higher than the preset threshold v zc d_ ovp for 10 consecutive pulses, the ic enters output over voltage protection . 3.6.6 over temperature if the junction temperature of controller chip exceeds t jcon_o t p , the ic enters into over temperature protection (otp) auto restart mode. the controller implements with a 40 c hysteresis. in another word, the controller/ic can only resume from otp if its junction temperature drops 40 c from otp trigger point . please be noted that the separated coolmos tm chip may have different temperature (mostly higher) from the controller chip. 3.6.7 cs short to gnd if th e voltage at the current sense pin is shorted and lower than the preset threshold v cs _ s tg with certain blanking time t cs _ s tg_b for 3 consecutive pulses during on - time of the power mosfet , the ic enters cs short to gnd protection . figure 11 non switch auto restart mode v c c _ o f f t v c s t v v c c n o s w i t c h i n g f a u l t d e t e c t e d f a u l t r e l e a s e d t s w i t c h i n g s t a r t a t t h e f o l l o w i n g r e s t a r t c y c l e v c c _ o n s t a r t u p a n d d e t e c t a t e v e r y c h a r g i n g c y c l e
datasheet 16 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package functional description figure 12 auto restart mode figure 13 odd skip auto restart mode v c c _ o f f t v c s t v v c c f a u l t d e t e c t e d f a u l t r e l e a s e d t s w i t c h i n g s t a r t a t t h e f o l l o w i n g r e s t a r t c y c l e v c c _ o n s t a r t u p a n d d e t e c t a t e v e r y c h a r g i n g c y c l e v c c _ o f f t v c s t v v c c f a u l t d e t e c t e d f a u l t r e l e a s e d t s w i t c h i n g s t a r t a t t h e f o l l o w i n g e v e n r e s t a r t c y c l e v c c _ o n s t a r t u p a n d d e t e c t a t e v e r y e v e n c h a r g i n g c y c l e n o d e t e c t n o d e t e c t
datasheet 17 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package electrical characteristics 4 electrical characteristics attention: all voltages a r e measured with respect to ground (pin 8 for dip - 7 and pin12 for dso - 12 ). the voltage levels are valid if other ratings are not violated. 4.1 absolute maximum ratings attention: stresses above the max imum values listed here may cause permanent damage to the device. exposure to absolute maximum rating conditions for extended periods may affect device reliability. maximum ratings are absolute ratings; exceeding only one of these val ues may cause irreversible damage to the integrated circuit. system design needs to ensure not to exceed the maximum limit. ta =25c unless otherwise specified. table 6 absolute maximum ratings parameter symbol limit values unit note / test condition min. max. drain source voltage (coolmos tm ) ice5qrxx70ax v ds - 700 v t j = 25 c drain source voltage (coolmos tm ) ice5qrxx80ax v ds - 800 v t j = 25 c pulse drain current ice5qr4770az 1 ICE5QR4780AZ 1 ice5qr2270az 2 ice5qr2280az 2 ice5qr1070az 2 ice5qr0680az 2 ice5qr4770ag 1 ice5qr1680ag 2 ice5qr0680ag 2 i d_pulse - - - - - - - - - 2.2 2.6 5.8 5.8 5.8 5.8 2.2 5.8 5.8 a avalanche energy, repetitive , t ar limited by max. t j =150c with t j ,start = 25 c ice5qr4770az ICE5QR4780AZ ice5qr2270az ice5qr2280az ice5qr1070az ice5qr0680az ice5qr4770ag ice5qr1680ag e ar - - - - - - - - 0.02 0.02 0.07 0.05 0.06 0.22 0.02 0.07 mj i d =0 .14 a, v dd =50 v i d =0 .2 a, v dd =50 v i d =0 .4 a, v dd =50 v i d =0 .4 a, v dd =50 v i d =0 .38 a, v dd =50 v i d = 1.8 a, v dd =50 v i d =0 .14 a, v dd =50 v i d =0 .6 a, v dd =50 v 1 pulse width t p l imited by t j , max 2 pulse width t p =20 s and l imited by t j , max
datasheet 18 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package electrical characteristics ice5qr0680ag - 0.22 i d = 1.8 a, v dd =50 v avalanche current, repetitive , t ar limited by max. t j =150c with t j ,start = 25 c ice5qr4770az ICE5QR4780AZ ice5qr2270az ice5qr2280az ice5qr1070az ice5qr0680az ice5qr4770ag ice5qr1680ag ice5qr0680ag i ar - - - - - - - - - 0.14 0.2 0.4 0.4 0.82 1.8 0.14 0.6 1.8 a vcc supply voltage v cc - 0.3 27.0 v fb voltage v fb - 0.3 3.6 v zcd voltage v zcd - 0.3 27 v cs voltage v cs - 0.3 3.6 v vin voltage v in - 0.3 3.6 v maximum dc current on any pin except drain & cs pins - 10.0 10.0 ma esd robustness hbm v esd _ hbm - 2000 v according to eia/jesd22 esd robustness cd m v esd _cd m - 5 00 v junction temperature range t j - 40 150 c controller & coolmos storage temperature t store - 55 150 c thermal resistance ( junction - ambient ) ice5qr4770az ICE5QR4780AZ ice5qr2270az ice5qr2280az ice5qr1070az ice5qr0680az ice5qr4770ag ice5qr1680ag ice5qr0680ag r thja - - - - - - - - - 106 107 103 104 100 100 104 95 94 k/w setup according to the jesd51 standard and using minimum drain pin copper area in a 2 oz copper single sided pcb
datasheet 19 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package electrical c haracteristics 4.2 operating range note : within the operating range the ic operates as described in the functional description. table 7 operating range parameter symbol limit values unit remark min. max. vcc supply voltage v vcc v vcc_off v vcc_ovp junction temperature of controller t jcon_op - 40 t jcon_otp ?c max value limited due to otp of controller chip junction temperature of coolmos t jcoolmos_op - 40 150 ?c 4.3 operating conditions note: the electrical characteristics involve the spread of values within the specified supply voltage and junction temperature range t j from C 40 c to 125 c. typical values represent the median values, which are related to 25c. if not otherwise stated, a supp ly voltage of v cc = 18 v is assumed. table 8 operating conditions parameter symbol limit values unit note / test condition min. typ. max. vcc charge current i vcc _ charge1 - 0.35 - 0.2 - 0.09 ma v vcc =0v , r startup =50m? and v drain =90 v i vcc _ charge2 - - 3.2 - ma v vcc =3 v , r startup =50m? and v drain =90 v i vcc _ charge3 - 5 - 3 - 1 ma v vcc =15 v , r startup =50m? and v drain =90 v current consumption, startup current i vcc _ startup - 0.19 - ma v vcc = 15 v current consumption, normal i vcc _ normal - 0.9 - ma i fb =0 a (no gate switching) current consumption, auto restart i vcc _ar - 320 - a current consumption, burst mode i vcc _ burst mode - 0.5 - ma v fb = 1.8v vcc turn - on threshold voltage v vcc _ on 15.3 16 16.5 v vcc turn - off threshold voltage v vcc _ off 9.5 10 10.5 v vcc short circuit protection v vcc _scp - 1.1 1.9 v vcc turn - off blanking t vcc _ off_b - 50 - s
datasheet 20 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package electrical characteristics 4.4 internal voltage reference table 9 internal voltage reference parameter symbol limit values unit note / test condition min. typ. max. internal reference voltage v ref 3.2 3.3 3.39 v measured at pin fb i fb =0 4.5 pwm section table 10 pwm section parameter symbol limit values unit note / test condition min. typ. max. feedback pull - up resistor r fb 11 15 20 k ? pwm - op gain g pwm 1.95 2 .05 2.15 - offset for voltage ramp v pwm 0.42 0. 5 0.58 v maximum on time in normal operation t onmax 20 35 60 s m aximum off time in normal operation t offmax 24 42.5 71 s 4.6 current sense table 11 current sense parameter symbol limit values unit note / test condition min. typ. max. peak current limitation in normal operation v cs _ n 0.94 1.00 1.06 v leading edge blanking time t cs _ leb 118 220 462 ns peak current limitation in active burst mode C level 1 v cs _ bl 1 0.26 0.31 0.36 v peak current limitation in active burst mode C level 2 v cs _ b l2 0.3 0.35 0.4 v
datasheet 21 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package electrical characteristics 4.7 soft start table 12 soft start parameter symbol limit values unit note / test condition min. typ. max. soft - start time t ss 8.5 12 - ms soft - start time step t ss _s 1 - 3 - ms internal regulation voltage at first step v ss 1 1 - 0.30 - v cs peak voltage internal regulation voltage step at soft start v ss_s 1 - 0.15 - v cs peak voltage 4.8 digital zero crossing table 13 digital zero crossing parameter symbol limit values unit note / test condition min. typ. max. zero crossing threshold voltage v zcd _ ct 60 10 0 150 mv zero crossing ringing suppression threshold v zcd _ rs - 0.45 - v minimum ringing suppression time t zcd _ rs1 1.5 2.5 4.1 s v zcd > v zcd,rs maximum ringing suppression time t zcd _ rs2 - 25.00 - s v zcd < v zcd,rs threshold to reset up/down counter v fb _ r - 2. 80 - v threshold for downward counting v fb _ hlc - 2.0 5 - v threshold for upward counting v fb _ lhc - 1. 55 - v counter time t count - 48 - ms zcd resistance r zcd 2.5 3.0 3.5 k ? internal resistor at zcd pin vin voltage threshold for line selection v vin _ ref 1.48 1.5 2 1.58 v blanking time for vin voltage threshold for line selection t vin _ ref - 16.00 - ms 1 the parameter is not subjected to production test - verified by design/characterization
datasheet 22 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package electrical characteristics 4.9 active burst mode table 14 active burst mode parameter symbol limit values unit note / test condition min. typ. max. charging current to select burst mode i sel 2.1 3 3.9 a burst mode selection reference voltage v ref_b 2.65 2.75 2.85 v feedback voltage for entering active burst mode for level 1 v fb_ebl1 0.86 0.9 0 0.94 v feedback voltage for en tering active burst mode for level 2 v fb_ebl2 1.0 1.05 1.1 v blanking time for entering active burst mode t fb _ beb - 20 - ms feedback voltage for leaving active burst mode v fb _ lb 2.65 2.75 2.85 v feedback voltage for burst - on v fb _ bon 2.3 2. 40 2.5 v feedback voltage for burst - off v fb _ boff 1.9 2. 00 2.1 v 4.10 line over voltage protection table 15 line ovp parameter symbol limit values unit note / test condition min. typ. max. line over voltage threshold v vin _ lovp 2.8 2.9 3.0 v line over voltage blanking t vin _ lovp_b - 250 - s 4.11 brownout protection table 16 brownout protection parameter symbol limit values unit note / test condition min. typ. max. brownin threshold v vin _ bi 0.63 0.6 6 0.69 v brownin blanking t vin _ bi_b - 250 - s brownout threshold v vin _ bo 0.37 0.4 0 0.43 v brownout blanking t vin _ bo_b - 250 - s
datasheet 23 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package electrical characteristics 4.12 v cc over voltage protection table 17 vcc over voltage protection parameter symbol limit values unit note / test condition min. typ. max. vcc over voltage threshold v vcc _ ovp 24 25.50 27 v vcc over voltage blanking t vcc _ ovp_b - 50.00 - s 4.13 over load protection table 18 overload protection parameter symbol limit values unit note / test condition min. typ. max. over load detection threshold for olp protection at fb pin v fb _ olp 2.65 2.75 2.85 v over load protection blanking time t fb _ olp_b - 30 - ms 4.14 output over voltage protection table 19 output ovp parameter symbol limit values unit note / test condition min. typ. max. output over voltage threshold v zc d_ ovp 1.9 2.0 2.1 v output over voltage blanking pulse p zc d_ ovp_b - 10 - pulse consecutive pulse 4.15 thermal protection table 20 thermal protection parameter symbol limit values unit note / test condition min. typ. max. over temperature protection 1 t jcon_otp 129 140 150 c junction temperature of the controller chip (not the coolmos? chip) over temperature hysteresis t jhys_otp - 40 - c over temperature blanking time t jcon_otp_b - 50 - s 1 the parameter is not subjected to production test - verified by design/characterization
datasheet 24 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package electrical characteristics 4.16 cs short to gnd protection table 21 cs short to gnd protection parameter symbol limit values unit note / test condition min. typ. max. cs short to gnd protection v cs _ stg 0.06 0.10 0.15 v cs short to gnd consecutive trigger p cs _ stg - 3 - cycle cs short to gnd sample period t cs _ stg_sam 2.3 5 - s 4.17 coolmos? section table 22 ice5qrxxxxax parameter symbol limit values unit note / test condition min. typ. max. drain source breakdown voltage ice5qrxx70ax ice5qrxx80ax v (br)dss 700 800 - - - - v t j = 25c drain to cs on - resistance (inclusive of low side mosfet) r dson ? ice5qr4770az - - 4.73 8.73 5.18 - t j = 25c t j=125c 1 , i d =0.4a ICE5QR4780AZ - - 4.13 8.69 4.85 - t j = 25c t j=125c 1 , i d =0.4a ice5qr2270az - - 2.13 4.31 2.33 - t j = 25c t j=125c 1 , i d =1a ice5qr2280az - - 2.13 4.31 2.35 - t j = 25c t j=125c 1 , i d =1a ice5qr1070az - - 1.15 1.85 1.25 t j = 25c t j=125c 1 , i d =1.1a ice5qr0680az - - 0.71 1.27 0.80 - t j = 25c t j=125c 1 , i d =2a ice5qr4770ag - - 4.73 8.73 5.18 - t j = 25c t j=125c 1 , i d =0.4a ice5qr1680ag - - 1.53 3.01 1.75 - t j = 25c t j=125c 1 , i d =1.4a ice5qr0680ag - - 0.71 1.27 0.80 - t j = 25c t j=125c 1 , i d =2a
datasheet 25 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package electrical characteristics effective output capacitance, energy related 1 c o(er) pf ice5qr4770az - 3.4 - v gs = 0v, v d s = 0~480v ICE5QR4780AZ - 3 - v gs = 0v, v d s = 0~500v ice5qr2270az - 10 - v gs = 0v, v d s = 0~480v ice5qr2280az - 7 - v gs = 0v, v d s = 0~500v ice5qr1070az - 13 - v gs = 0v, v d s = 0~400v ice5qr0680az - 24 - v gs = 0v, v d s = 0~500v ice5qr4770ag - 3.4 - v gs = 0v, v d s = 0~480v ice5qr1680ag - 8 - v gs = 0v, v d s = 0~500v ice5qr0680ag - 24 - v gs = 0v, v d s = 0~500v rise time 2 t rise - 30 - ns fall time 2 t fall - 30 - ns 1 the parameter is not subjected to production test - verified by design/characterization 2 measured in a typical flyback converter application
datasheet 26 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package coolmos? performance characteristics 5 c oolmos? performance characteristics figure 14 safe operating area (soa) curve for ice5qr4770az figure 15 safe operating area (soa) curve for ICE5QR4780AZ
datasheet 27 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package coolmos? p erformance characteristics figure 16 safe operating area (soa) curve for ice5qr2270az figure 17 safe operating area (soa) curve for ice5qr2280az
datasheet 28 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package coolmos? performance characteristics figure 18 safe operating area (soa) curve for ice5qr1070az figure 19 safe operating area (soa) curve for ice5qr0680az
datasheet 29 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package coolmos? performance chara cteristics figure 20 safe operating area (soa) curve for ice5qr4770ag figure 21 safe operating area (soa) curve for ice5qr1680ag
datasheet 30 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package coolmos? performance characteristics figure 22 safe operating area (soa) curve for ice5qr0680ag figure 23 power dissipation of ice5qr4770az, dip - 7 package; p tot = f(t a ), (m aximum ratings as given in section 4.1 must not be exceeded )
datasheet 31 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package coolmos? performance characteristics figure 24 power dissipation of ICE5QR4780AZ, dip - 7 package; p tot = f(t a ), (m aximum ratings as given in section 4.1 must not be exceeded ) figure 25 power dissipation of ice5qr2270az, dip - 7 package; p tot = f(t a ), (m aximum ratings as given in section 4.1 must not be exceeded )
datasheet 32 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package coolmos? performance characteristics figure 26 power dissipation of ice5qr2280az, dip - 7 package; p tot = f(t a ), (m aximum ratings as given in section 4.1 must not be exceeded ) figure 27 power dissipation of ice5qr1070az, dip - 7 package; p tot = f(t a ), (m aximum ratings as given in section 4.1 must no t be exceeded )
datasheet 33 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package coolmos? performance characteristics figure 28 power dissipation of ice5qr0680az, dip - 7 package; p tot = f(t a ), (m aximum ratings as given in section 4.1 must not be exceeded ) figure 29 power dissipation of ice5qr4770ag, dso - 12 package; p tot = f(t a ), (m aximum ratings as given in section 4.1 must not be exceeded )
datasheet 34 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package coolmos? performance characteristics figure 30 power dissipation of ice5qr1680ag, dso - 12 package; p tot = f(t a ), (m aximum ratings as given in section 4.1 must not be exceeded ) figure 31 power dissipation of ice5qr0680ag, dso - 12 package; p tot = f(t a ), (m aximum ratings as given in section 4.1 must not be exceeded )
datasheet 35 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package coolmos? performance characteristics figure 32 drain - source breakdown voltage ice5qrxx70ax; v br(dss) = f(t j ), i d =1 ma figure 33 drain - source breakdown voltage ice5qrxx80ax; v br(dss) = f(t j ), i d =1 ma 620 640 660 680 700 720 740 760 780 -75 -50 -25 0 25 50 75 100 125 150 175 v br(dss) [v] t j [ c]
datasheet 36 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package coolmos? performance characteristics figure 34 typical coolmos ? capacitances of ice5qr4770ax (c=f(v ds );v gs =0 v; f=1 mhz) figure 35 typical coolmos ? capacitances of ICE5QR4780AZ (c=f(v ds );v gs =0 v; f=250 khz)
datasheet 37 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package coolmos? performance characteristics figure 36 typical coolmos ? capacitances of ice5qr2270az (c=f(v ds );v gs =0 v; f=1 mhz) figure 37 typical coolmos ? capacitances of ice5qr2280az (c=f(v ds );v gs =0 v; f=250 khz)
datasheet 38 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package coolmos? performance characteristics figure 38 typical coolmos ? capacitances of ice5qr1070az (c=f(v ds );v gs =0 v; f=250 khz) figure 39 typical coolmos ? capacitances of ice5qr0680ax (c=f(v ds );v gs =0 v; f=250 khz)
datasheet 39 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package coolmos? performance characteristics figure 40 typical coolmos ? capacitances of ice5qr1680a g(c=f(v ds );v gs =0 v; f=250 khz)
datasheet 40 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package output power curve 6 output power curve the calculated output power curves giving the typical output power versus ambient temperature are shown below. the curves are derived based on a typical discontinuous mode flyback in an open frame design at t a =50c, t j =125c (integrated high voltage mosfet ) , using minimum drain pin copper area in a 2 oz copper single sided pcb and s teady state operation only ( no design margins for abnormal operation modes are included ). the output power figure is for selection purpose only. the actual power can vary dependi ng on particular designs . i n a power supply system, appropriate thermal design margins must be applied to make sure that the maximum ratings given in section 4.1 ar e respected at all times . figure 41 output power curve of ice5qr4770az, v in =85~ 300 v ac ; p out =f(t a ) figure 42 output power curve of ice5qr4770az, v in =22 0 v ac ; p out =f(t a )
datasheet 41 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package output power curve figure 43 output power curve of ICE5QR4780AZ, v in =85~ 300 v ac ; p out =f(t a ) figure 44 output power curve of ICE5QR4780AZ, v in =22 0 v ac ; p out =f(t a )
datasheet 42 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package output power curve figure 45 output power curve of ice5qr2270az, v in =85~ 300 v ac ; p out =f(t a ) figure 46 output power curve of ice5qr2270az, v in =22 0 v ac ; p out =f(t a )
datasheet 43 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package output power curve figure 47 output power curve of ice5qr2280az, v in =85~ 300 v ac ; p out =f(t a ) figure 48 output power curve of ice5qr2280az, v in =22 0 v ac ; p out =f(t a )
datasheet 44 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package output power c urve figure 49 output power curve of ice5qr1070az, v in =85~ 300 v ac ; p out =f(t a ) figure 50 output power curve of ice5qr1070az, v in =22 0 v ac ; p out =f(t a )
datasheet 45 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package output power curve figure 51 output power curve of ice5qr0680az, v in =85~ 300 v ac ; p out =f(t a ) figure 52 output power curve of ice5qr0680az, v in =22 0 v ac ; p out =f(t a )
datasheet 46 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package output power curve figure 53 output power curve of ice5qr4770ag, v in =85~ 300 v ac ; p out =f(t a ) figure 54 output power curve of ice5qr4770ag, v in =22 0 v ac ; p out =f(t a )
datasheet 47 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package output power curve figure 55 output power curve of ice5qr1680ag, v in =85~ 300 v ac ; p out =f(t a ) figure 56 output power curve of ice5qr1680ag, v in =22 0 v ac ; p out =f(t a )
datasheet 48 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package output power curve figure 57 output power curve of ice5qr0680ag, v in =85~ 300 v ac ; p out =f(t a ) figure 58 output power curve of ice5qr0680ag, v in =22 0 v ac ; p out =f(t a )
datasheet 49 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package outline dimension 7 outline dimension figure 59 pg - dip - 7
datasheet 50 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package outline dimension figure 60 pg - dso - 12
datasheet 51 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package marking 8 marking figure 61 marking of dip - 7 figure 62 marking of dso - 12
datasheet 52 of 53 v 2.1 2017 - 08 - 11 quasi - resonant 700 v/800 v coolset? - in dip - 7 and dso - 12 package revision history revision h istory document version date of release description of change s v2.1 11 aug 2017 page 8 ~14 text content revised page 17, 18 and 19 (reference to erra ta sheet 10160aerra ) table 6, the limit values for v ds shall be at the maximum column table 8, the polarity for maximum limit on i vcc_charge1 shall be negative additional text content revised v2.0 4 jul 2017 page 2, 17, 18, 24~44 addition of ice5qr1070az page 35 update of 700v coolset ? drain - source breakdown voltage as shown in figure 32 reference to errata sheet #10157aerra
published by infineon technologies ag 81726 mnchen , germany ? 2017 infineon technologies ag. all rights reserved. do you have a question about this document? email: erratum@infineon.com document reference important notice the information given in this document shall in no event be regarded as a guarantee of conditions or chara cteristics (beschaffenheitsgarantie) . with respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, infineon technologies hereby disclaims any and all warranties and liabiliti es of any kind, including without limitation warranties of non - infringement of intellectual property rights of any third party. in addition, any information given in this document is subject to customers compliance with its obligations stated in this do cument and any applicable legal requirements, norms and standards concerning customers products and any use of the product of infineon technologies in customers applications. the data contained in this document is exclusively intended for technically t rained staff. it is the responsibility of customers technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. for further information on the product, technology, delivery terms and conditions and prices please contact your nearest infineon technologies o ffice ( www.infineon.com ). w arnings due to technical requirements products may contain dangerous substances. for information on the types in question please contact your nearest infineon technologies office. except as otherwise explicitly approved by infineon technologies in a written document signed by authorized repre sentatives of infineon technologies, infineon technologies products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. edition 2017 - 08 - 11 trademarks all referenced product or service names and trademarks are the property of their respective owners.

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